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ADP3121
C BST1 + 10
C BST2 + 10
* C BST1
I MAX + I DC (per phase) ) (V CC * V OUT )
I F(AVG) + Q GATE f MAX
V CC * V D
I F(PEAK) +
R BST
Re ? arranging Equation 1 and Equation 2 to solve for
C BST1 yields:
Q GATE
V CC * V D
C BST2 can then be found by rearranging Equation 1.
Q GATE
V GATE
For example, an NTD60N02 has a total gate charge of
about 12 nC at V GATE = 7.0 V. Using V CC = 12 V and
V D = 0.1 V, then C BST1 = 12 nF and C BST2 = 6.8 nF. Good
quality ceramic capacitors should be used.
R BST is used to limit slew rate and minimize ringing at the
switch node. It also provides peak current limiting through
D1. An R BST value of 1.5 W to 2.2 W is a good choice. The
resistor needs to handle at least 250 m W due to the peak
currents that flow through it.
A small signal diode can be used for the bootstrap diode
due to the ample gate drive voltage supplied by V CC . The
bootstrap diode must have a minimum 15 V rating to
withstand the maximum supply voltage. The average
forward current can be estimated by:
(eq. 3)
where f MAX is the maximum switching frequency of the
controller.
The peak surge current rating should be calculated by:
(eq. 4)
MOSFET Selection
When interfacing the ADP3121 to external MOSFETs,
the designer should consider ways to make a robust design
that minimizes stresses on both the driver and the
MOSFETs. These stresses include exceeding the short time
duration voltage ratings on the driver pins as well as the
external MOSFET.
It is also highly recommended to use the Boot ? Snap
circuit to improve the interaction of the driver with the
characteristics of the MOSFETs. If a simple bootstrap
arrangement is used, make sure to include a proper snubber
network on the SW node.
High ? Side (Control) MOSFETs
A high ? side, high speed MOSFET is usually selected to
minimize switching losses (see the ADP3186 or ADP3188
data sheet for Flex ? Mode controller details). This typically
implies a low gate resistance and low input
capacitance/charge device. Yet, a significant source lead
inductance can also exist that depends mainly on the
MOSFET package; it is best to contact the MOSFET vendor
for this information.
The ADP3121 DRVH output impedance and the input
resistance of the MOSFETs determine the rate of charge
delivery to the internal capacitance of the gate. This
determines the speed at which the MOSFETs turn on and off.
However, because of potentially large currents flowing in
the MOSFETs at the on and off times (this current is usually
larger at turn ? off due to ramping up of the output current in
the output inductor), the source lead inductance generates a
significant voltage when the high ? side MOSFETs switch
off. This creates a significant drain ? source voltage spike
across the internal die of the MOSFETs and can lead to a
catastrophic avalanche. The mechanisms involved in this
avalanche condition are referenced in literature from the
MOSFET suppliers.
The MOSFET vendor should provide a rating for the
maximum voltage slew rate at drain current around which this
can be designed. Once this specification is obtained,
determine the maximum current expected in the MOSFET
by:
D MAX
f MAX L OUT
(eq. 5)
where:
D MAX is determined for the VR controller being used with
the driver. This current is divided roughly equally between
MOSFETs if more than one is used (assume a worst ? case
mismatch of 30% for design margin).
L OUT is the output inductor value.
When producing the design, there is no exact method for
calculating the dV/dt due to the parasitic effects in the
external MOSFETs as well as the PCB. However, it can be
measured to determine if it is safe. If it appears that the dV/dt
is too fast, an optional gate resistor can be added between
DRVH and the high ? side MOSFETs. This resistor slows
down the dV/dt, but it increases the switching losses in the
high ? side MOSFETs. The ADP3121 is optimally designed
with an internal drive impedance that works with most
MOSFETs to switch them efficiently, yet minimizes dV/dt.
However, some high speed MOSFETs can require this
external gate resistor depending on the currents being
switched in the MOSFET.
Low ? Side (Synchronous) MOSFETs
The low ? side MOSFETs are usually selected to have a
low on resistance to minimize conduction losses. This
usually implies a large input gate capacitance and gate
charge. The first concern is to make sure the power delivery
from the ADP3121 DRVL does not exceed the thermal
rating of the driver (see the ADP3186, ADP3188, or
ADP3189 data sheets for Flex ? Mode controller details).
The next concern for the low ? side MOSFETs is to prevent
them from being inadvertently switched on when the
high ? side MOSFET turns on. This occurs due to the
drain ? gate (Miller capacitance, also specified as C rss
capacitance) of the MOSFET. When the drain of the
low ? side MOSFET is switched to V CC by the high ? side
turning on (at a dV/dt rate), the internal gate of the low ? side
MOSFET is pulled up by an amount roughly equal to V CC
× (C rss /C iss ). It is important to make sure this does not put the
MOSFET into conduction.
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